AI Compiler Optimization Engineer

Huawei R&D UK

CAMBRIDGE · GB

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Full-time

MID

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About the Role

Huawei R&D UK is seeking an AI Compiler Optimization Engineer to optimize AI model inference performance using advanced compiler technologies. The role focuses on performance tuning for CPU and hybrid CPU/XPU architectures, profiling AI frameworks, and delivering research insights to drive improvements.

Responsibilities

Implement compiler techniques (e.g., MLIR level optimizations, LLVM backend optimizations) to enhance inference performance on CPU and CPU/XPU hybrid systems
Optimize JIT level compute graphs with operator fusion and memory allocation for latency/throughput improvements
Profile end-to-end inference workflows on frameworks like TensorFlow, PyTorch, ONNX, and llama.cpp to identify bottlenecks
Propose and implement optimization strategies such as kernel tuning and graph-level optimizations
Track and analyze AI & compiler research, producing actionable insight reports on trends and benchmarks

Requirements

Proficiency in C/C++ and compiler infrastructure (LLVM, MLIR, or similar)
Deep understanding of AI model architectures and inference workflows
Experience with performance profiling tools (e.g., perf, TensorBoard, VTune)
Familiarity with CPU/XPU hardware architectures and optimization techniques
Strong analytical and problem-solving skills

Huawei R&D UK

Cambridge · GB · 340+ employees

Huawei Technologies Research & Development (UK) Limited is an R&D organization focused on basic research, network architectures, and key enabling technologies. It operates as part of Huawei's global innovation value chain, aiming to inspire advancements in computing and communications technologies.