Machine Learning Engineer (ML for Chip Design)

Sourced from rolewatch.irfanmiral.com

Train, fine-tune, and post-train large language models for chip design and verification tasks, including supervised fine-tuning, human-feedback training, and reinforcement learning. Build data pipelines and synthetic data, design evaluation methods for model accuracy and AI agent performance, and collaborate with research scientists and chip-design experts to ship production AI agents. Work on large GPU clusters to improve AI code-generation workflows for hardware design.

• Train, fine-tune, and post-train LLMs for chip design and verification using SFT, RLHF, and reinforcement learning
• Build and maintain data pipelines including collection, cleaning, and synthetic data creation
• Design evaluation methods to measure model accuracy and AI agent performance
• Collaborate with research scientists, systems engineers, and chip-design experts to productionize AI agents
• Run experiments on large GPU clusters to study model behavior and improve AI code-generation workflows

• B.S., M.S., or PhD in Computer Science, Electrical Engineering, or a related field, or 2–10 years as an ML engineer / recent PhD graduate
• Hands-on experience training or fine-tuning LLMs with Python and PyTorch
• Familiarity with distributed GPU training and inference (vLLM, SGLang, CUDA, Ray)
• Ability to work on-site 5 days a week in San Jose

• Hardware design languages (RTL, Verilog, SystemVerilog)
• Experience with agentic AI workflows
• Hugging Face Transformers